IFIP TC6 Open Digital Library

IESS 2007: Irvine, CA, USA

Embedded System Design: Topics, Techniques and Trends, IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS), May 30 - June 1, 2007, Irvine, CA, USA

Achim Rettberg, Mauro Cesar Zanella, Rainer Dömer, Andreas Gerstlauer, Franz-Josef Rammig

Springer, IFIP Advances in Information and Communication Technology 231, ISBN: 978-0-387-72257-3



Contents

Validation and Verification

Requirements and Concepts for Transaction Level Assertion Refinement.

Wolfgang Ecker, Volkan Esen, Thomas Steininger, Michael Velten

 1-14

Using a Runtime Measurement Device with Measurement-Based WCET Analysis.

Bernhard Rieder, Ingomar Wenzel, Klaus Steinhammer, Peter P. Puschner

 15-26

Implementing Real-Time Algorithms by using the AAA Prototyping Methodology.

Pierre Niang, Thierry Grandpierre, Mohamed Akil

 27-36

Run-Time efficient Feasibility Analysis of Uni-Processor Systems with Static Priorities.

Karsten Albers, Frank Bodmann, Frank Slomka

 37-46

Approach for a Formal Verification of a Bit-serial Pipelined Architecture.

Henning Zabel, Achim Rettberg, Alexander Krupp

 47-56

Automotive Applications

Automotive System Optimization using Sensitivity Analysis.

Razvan Racu, Arne Hamann, Rolf Ernst

 57-70

Towards a Dynamically Reconfigurable Automotive Control System Architecture.

Richard Anthony, Achim Rettberg, De-Jiu Chen, Isabell Jahnich, Gerrit de Boer, Cecilia Ekelin

 71-84

An OSEK/VDX-based Multi-JVM for Automotive Appliances.

Christian Wawersich, Michael Stilkerich, Wolfgang Schröder-Preikschat

 85-96

Towards Dynamic Load Balancing for Distributed Embedded Automotive Systems.

Isabell Jahnich, Achim Rettberg

 97-106

Hardware Synthesis

Automatic Data Path Generation from C code for Custom Processors.

Jelena Trajkovic, Daniel Gajski

 107-120

Interconnect-aware Pipeline Synthesis for Array based Reconfigurable Architectures.

Shanghua Gao, Kenshu Seto, Satoshi Komatsu, Masahiro Fujita

 121-134

An Interactive Design Environment for C-based High-Level Synthesis.

Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel D. Gajski

 135-144

Integrated Coupling and Clock Frequency Assignment of Accelerators During Hardware/Software Partitioning.

Scott Sirowy, Frank Vahid

 145-154

Embedded Vertex Shader in FPGA.

Lars Middendorf, Felix Mühlbauer, Georg Umlauf, Christophe Bobda

 155-164

Specification and Partitioning

A Hybrid Approach for System-Level Design Evaluation.

Alexander Viehl, Markus Schwarz, Oliver Bringmann, Wolfgang Rosenstiel

 165-178

Automatic Parallelization of Sequential Specifications for Symmetric MPSoCs.

Fabrizio Ferrandi, Luca Fossati, Marco Lattuada, Gianluca Palermo, Donatella Sciuto, Antonino Tumeo

 179-192

An Interactive Model Re-Coder for Efficient SoC Specification.

Pramod Chandraiah, Rainer Dömer

 193-206

Constrained and Unconstrained Hardware-Software Partitioning using Particle Swarm Optimization Technique.

Mohamed B. Abdelhalim, A. E. Salama, Serag E.-D. Habib

 207-220

Design Methodologies

Using Aspect-Oriented Concepts in the Requirements Analysis of Distributed Real-Time Embedded Systems.

Edison Pignaton de Freitas, Marco A. Wehrmeister, Carlos Eduardo Pereira, Flávio Rech Wagner, Elias Teodoro Silva Jr., Fabiano Costa Carvalho

 221-230

Smart Speed TechnologyTM.

Mike Olivarez, Brian Beasley

 231-240

Embedded Software

Power Optimization for Embedded System Idle Time in the Presence of Periodic Interrupt Services.

Gang Zeng, Hiroyuki Tomiyama, Hiroaki Takada

 241-254

Reducing the Code Size of Retimed Software Loops under Timing and Resource Constraints.

Noureddine Chabini, Wayne Wolf

 255-268

Identification and Removal of Program Slice Criteria for Code Size Reduction in Embedded Systems.

Mark Panahi, Trevor Harmon, Juan A. Colmenares, Shruti Gorappa, Raymond Klefstad

 269-278

Configurable Hybridkernel for Embedded Real-Time Systems.

Timo Kerstan, Simon Oberthür

 279-288

Embedded Software Development in a System-Level Design Flow.

Gunar Schirner, Gautam Sachdeva, Andreas Gerstlauer, Rainer Dömer

 289-298

Network on Chip

Data Reuse Driven Memory and Network-On-Chip Co-Synthesis.

Ilya Issenin, Nikil Dutt

 299-312

Efficient and Extensible Transaction Level Modeling Based on an Object Oriented Model of Bus Transactions.

Rauf Salimi Khaligh, Martin Radetzki

 313-324

Hardware Implementation of the Time-Triggered Ethernet Controller.

Klaus Steinhammer, Astrit Ademaj

 325-338

Error Containment in the Time-Triggered System-On-a-Chip Architecture.

Roman Obermaisser, Hermann Kopetz, Christian El Salloum, Bernhard Huber

 339-352

Medical Applications

Generic Architecture Designed for Biomedical Embedded Systems.

Leonel Sousa, Moisés Simões Piedade, José A. Germano, Teresa Mendes de Almeida, Paulo Alexandre Crisóstomo Lopes, Filipe Cardoso, Paulo P. Freitas

 353-362

A Small High Performance Microprocessor Core Sirius for Embedded Low Power Designs, Demonstrated in a Medical Mass Application of an Electronic Pill(EPill®).

Dirk Jansen, Nidal Fawaz, Daniel Bau, Marc Durrenberger

 363-372

Distributed and Network Systems

Utilizing Reconfigurable Hardware to Optimize Workflows in Networked Nodes.

Dominik Murr, Felix Mühlbauer, Falko Dressler, Christophe Bobda

 373-386

Dynamic Software Update of Resource-Constrained Distributed Embedded Systems.

Meik Felser, Rüdiger Kapitza, Jürgen Kleinöder, Wolfgang Schröder-Preikschat

 387-400

Configurable Medium Access Control for Wireless Sensor Networks.

Lucas Francisco Wanner, Augusto Born de Oliveira, Antônio Augusto Fröhlich

 401-410

Integrating Wireless Sensor Networks and the Grid through POP-C++.

Augusto Born de Oliveira, Lucas Francisco Wanner, Pierre Kuonen, Antônio Augusto Fröhlich

 411-420

Panel

Modeling of Software-Hardware Complexes.

K. H. (Kane) Kim

 421

Modeling of Software-Hardware Complexes.

Nikil Dutt

 423-425

Enhancing a Real-Time Distributed Computing Component Model through Cross-Fertilization.

K. H. (Kane) Kim

 427-430

Modeling of Software-Hardware Complexes.

Hermann Kopetz

 431-432

Software-Hardware Complexes: Towards Flexible Borders.

Franz-Josef Rammig

 433-435

Tutorials

Embedded SW Design Space Exploration and Automation using UML-Based Tools.

Flávio Rech Wagner, Luigi Carro

 437-440

Medical Embedded Systems.

Roozbeh Jafari, Soheil Ghiasi, Majid Sarrafzadeh

 441-444