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The Connection Layout in a Lattice of Four-Terminal Switches26th IFIP/IEEE International Conference on Very Large Scale Integration - System on a Chip (VLSI-SoC), Oct 2018, Verona, Italy. pp.32-52, ⟨10.1007/978-3-030-23425-6_3⟩
Conference papers
hal-02321762v1
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Zero-Suppressed Binary Decision Diagrams Resilient to Index Faults8th IFIP International Conference on Theoretical Computer Science (TCS), Sep 2014, Rome, Italy. pp.1-12, ⟨10.1007/978-3-662-44602-7_1⟩
Conference papers
hal-01402013v1
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