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		Quantitative Optimization and Early Cost Estimation of Low-Power Hierarchical-Architecture SRAMs Based on Accurate Cost Models Yuan Ren , Tobias Noll 21th IFIP/IEEE International Conference on Very Large Scale Integration - System on a Chip (VLSI-SoC), Oct 2013, Istanbul, Turkey. pp.69-93, ⟨10.1007/978-3-319-23799-2_4⟩ Conference papers hal-01380299v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share Gmail Facebook X LinkedIn More