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An Improved Technique for Logic Gate Susceptibility Evaluation of Single Event Transient Faults27th IFIP/IEEE International Conference on Very Large Scale Integration - System on a Chip (VLSI-SoC), Oct 2019, Cusco, Peru. pp.69-88, ⟨10.1007/978-3-030-53273-4_4⟩
Conference papers
hal-03476616v1
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