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Timed Path Conditions in MATLAB/Simulink5th International Embedded Systems Symposium (IESS), Nov 2015, Foz do Iguaçu, Brazil. pp.64-76, ⟨10.1007/978-3-319-90023-0_6⟩
Conference papers
hal-01854161v1
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Bit-Precise Formal Verification for SystemC Using Satisfiability Modulo Theories Solving5th International Embedded Systems Symposium (IESS), Nov 2015, Foz do Iguaçu, Brazil. pp.51-63, ⟨10.1007/978-3-319-90023-0_5⟩
Conference papers
hal-01854165v1
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Model Checking Memory-Related Properties of Hardware/Software Co-designs4th International Embedded Systems Symposium (IESS), Jun 2013, Paderborn, Germany. pp.92-103, ⟨10.1007/978-3-642-38853-8_9⟩
Conference papers
hal-01466696v1
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