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A Reconfigurable Network-on-Chip Architecture for Optimal Multi-Processor SoC Communication19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Oct 2008, Rhodes Island, India. pp.232-250, ⟨10.1007/978-3-642-12267-5_13⟩
Conference papers
hal-01054544v1
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