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ReRAM Based In-Memory Computation of Single Bit Error Correcting BCH Code26th IFIP/IEEE International Conference on Very Large Scale Integration - System on a Chip (VLSI-SoC), Oct 2018, Verona, Italy. pp.128-146, ⟨10.1007/978-3-030-23425-6_7⟩
Conference papers
hal-02321764v1
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