Filter your results
- 5
- 5
- 5
- 2
- 3
- 1
- 2
- 5
- 5
- 2
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
|
|
|
sorted by
|
|
|
Leveraging Subgraph Extraction for Performance Portable Programming Frameworks on DL Accelerators15th IFIP International Conference on Network and Parallel Computing (NPC), Nov 2018, Muroran, Japan. pp.179-184, ⟨10.1007/978-3-030-05677-3_21⟩
Conference papers
hal-02279540v1
|
||
|
|
On Retargeting the AI Programming Framework to New Hardwares15th IFIP International Conference on Network and Parallel Computing (NPC), Nov 2018, Muroran, Japan. pp.39-51, ⟨10.1007/978-3-030-05677-3_4⟩
Conference papers
hal-02279561v1
|
||
|
|
Compiler-Assisted Operator Template Library for DNN Accelerators17th IFIP International Conference on Network and Parallel Computing (NPC), Sep 2020, Zhengzhou, China. pp.3-16, ⟨10.1007/978-3-030-79478-1_1⟩
Conference papers
hal-03768760v1
|
||
|
|
Monitoring Memory Behaviors and Mitigating NUMA Drawbacks on Tiered NVM Systems17th IFIP International Conference on Network and Parallel Computing (NPC), Sep 2020, Zhengzhou, China. pp.386-391, ⟨10.1007/978-3-030-79478-1_33⟩
Conference papers
hal-03768756v1
|
||
|
|
DLIR: An Intermediate Representation for Deep Learning Processors15th IFIP International Conference on Network and Parallel Computing (NPC), Nov 2018, Muroran, Japan. pp.169-173, ⟨10.1007/978-3-030-05677-3_19⟩
Conference papers
hal-02279553v1
|