@inproceedings{wang:hal-01593023,
  TITLE = {{Power-Aware Run-Time Incremental Mapping for 3-D Networks-on-Chip}},
  AUTHOR = {Wang, Xiaohang and Palesi, Maurizio and Yang, Mei and Jiang, Yingtao and Huang, Michael C. and Liu, Peng},
  URL = {https://inria.hal.science/hal-01593023},
  NOTE = {Part 6: Session 6: Best Paper -- 1},
  BOOKTITLE = {{8th Network and Parallel Computing (NPC)}},
  ADDRESS = {Changsha,, China},
  EDITOR = {Erik Altman and Weisong Shi},
  PUBLISHER = {{Springer}},
  SERIES = {Network and Parallel Computing},
  VOLUME = {LNCS-6985},
  PAGES = {232-247},
  YEAR = {2011},
  MONTH = Oct,
  DOI = {10.1007/978-3-642-24403-2\_19},
  KEYWORDS = {Networks-on-chip ; application mapping ; 3-D IC},
  PDF = {https://inria.hal.science/hal-01593023/file/978-3-642-24403-2_19_Chapter.pdf},
  HAL_ID = {hal-01593023},
  HAL_VERSION = {v1},
}