@inproceedings{barreto:hal-01555545,
  TITLE = {{Unifying Thread-Level Speculation and Transactional Memory}},
  AUTHOR = {Barreto, Jo{\~a}o and Dragojevic, Aleksandar and Ferreira, Paulo and Filipe, Ricardo and Guerraoui, Rachid},
  URL = {https://inria.hal.science/hal-01555545},
  NOTE = {Part 3: Architecture and Performance},
  BOOKTITLE = {{13th International Middleware Conference (MIDDLEWARE)}},
  ADDRESS = {Montreal,                        QC, Canada},
  EDITOR = {Priya Narasimhan and Peter Triantafillou},
  PUBLISHER = {{Springer}},
  SERIES = {Middleware 2012},
  VOLUME = {LNCS-7662},
  PAGES = {187-207},
  YEAR = {2012},
  MONTH = Dec,
  DOI = {10.1007/978-3-642-35170-9\_10},
  PDF = {https://inria.hal.science/hal-01555545/file/978-3-642-35170-9_10_Chapter.pdf},
  HAL_ID = {hal-01555545},
  HAL_VERSION = {v1},
}