@inproceedings{do:hal-01515991,
  TITLE = {{A 1-V CMOS Ultralow-Power Receiver Front End for the IEEE 802.15.4 Standard Using Tuned Passive Mixer Output Pole}},
  AUTHOR = {Do, Aaron and Boon, Chirn Chye and Krishna, Manthena Vamshi and Do, Anh Manh and Yeo, Kiat Seng},
  URL = {https://inria.hal.science/hal-01515991},
  BOOKTITLE = {{18th International Conference on Very Large Scale Integration (VLSISOC)}},
  ADDRESS = {Madrid, Spain},
  EDITOR = {Jos{\'e} L. Ayala and David Atienza Alonso and Ricardo Reis},
  PUBLISHER = {{Springer}},
  SERIES = {VLSI-SoC: Forward-Looking Trends in IC and Systems Design},
  VOLUME = {AICT-373},
  PAGES = {1-21},
  YEAR = {2010},
  MONTH = Sep,
  DOI = {10.1007/978-3-642-28566-0\_1},
  KEYWORDS = {RF Front End ; CMOS RF Integrated Circuits ; Low Power ; System on Chip},
  PDF = {https://inria.hal.science/hal-01515991/file/978-3-642-28566-0_1_Chapter.pdf},
  HAL_ID = {hal-01515991},
  HAL_VERSION = {v1},
}