@inproceedings{liu:hal-01513751,
  TITLE = {{Partition-Based Hardware Transactional Memory for Many-Core Processors}},
  AUTHOR = {Liu, Yi and Zhang, Xinwei and Wang, Yonghui and Qian, Depei and Chen, Yali and Wu, Jin},
  URL = {https://inria.hal.science/hal-01513751},
  NOTE = {Part 4: Session 4: Multi-core Computing and GPU},
  BOOKTITLE = {{10th International Conference on Network and Parallel Computing (NPC)}},
  ADDRESS = {Guiyang, China},
  EDITOR = {Ching-Hsien Hsu and Xiaoming Li and Xuanhua Shi and Ran Zheng},
  PUBLISHER = {{Springer}},
  SERIES = {Network and Parallel Computing},
  VOLUME = {LNCS-8147},
  PAGES = {308-321},
  YEAR = {2013},
  MONTH = Sep,
  DOI = {10.1007/978-3-642-40820-5\_26},
  KEYWORDS = {Transactional Memory ; Partition ; Many-core},
  PDF = {https://inria.hal.science/hal-01513751/file/978-3-642-40820-5_26_Chapter.pdf},
  HAL_ID = {hal-01513751},
  HAL_VERSION = {v1},
}