%0 Conference Proceedings
%T Hardware Based Security Enhanced Direct Memory Access
%+ Helmut Schmidt University, University of the Armed Forces Hamburg
%+ Commerzbank AG
%A Eckert, Marcel
%A Podebrad, Igor
%A Klauer, Bernd
%Z Part 2: Work in Progress
%< avec comité de lecture
%( Lecture Notes in Computer Science
%B 14th International Conference on Communications and Multimedia Security (CMS)
%C Magdeburg,, Germany
%Y Bart Decker
%Y Jana Dittmann
%Y Christian Kraetzer
%Y Claus Vielhauer
%I Springer
%3 Communications and Multimedia Security
%V LNCS-8099
%P 145-151
%8 2013-09-25
%D 2013
%R 10.1007/978-3-642-40779-6_12
%K Hardware Security
%K FPGA
%K Direct Memory Access
%K Malware
%Z Computer Science [cs]
%Z Computer Science [cs]/Networking and Internet Architecture [cs.NI]Conference papers
%X This paper presents an approach to prevent memory attacks enabled by DMA. DMA is a technique that is frequently used to release processors from simple memory transfers. DMA transfers are usually performed during idle times of the bus. A disadvantage of DMA transfers is that they are primarily unsupervised by anti malware agents. After the completion of a DMA activity the transfered data can be scanned for malicious codes. At this time the malicious structures are already in the memory and processor time is necessary to perform a malware scan. The approach presented in this paper enhances the DMA by a watchdog mechanisms that scans the data passing by and interrupts the processor after the detection of a malicious data or instruction sequence. Configurable hardware based on FPGAs is used to overcome the problem of frequently changing malware and malware signatures.
%G English
%Z TC 6
%Z TC 11
%2 https://inria.hal.science/hal-01492816/document
%2 https://inria.hal.science/hal-01492816/file/978-3-642-40779-6_12_Chapter.pdf
%L hal-01492816
%U https://inria.hal.science/hal-01492816
%~ IFIP-LNCS
%~ IFIP
%~ IFIP-TC
%~ IFIP-TC11
%~ IFIP-TC6
%~ IFIP-CMS
%~ IFIP-LNCS-8099