%0 Conference Proceedings
%T Simulation and Experimental Characterization of a Unified Memory Device with Two Floating-Gates
%+ North Carolina State University [Raleigh] (NC State)
%A Spigna, Neil, Di
%A Schinke, Daniel
%A Jayanti, Srikant
%A Misra, Veena
%A Franzon, Paul
%< avec comité de lecture
%( IFIP Advances in Information and Communication Technology
%B 20th International Conference on Very Large Scale Integration (VLSI-SoC)
%C Santa Cruz, CA, United States
%Y Andreas Burg
%Y Ayse Coskun
%Y Matthew Guthaus
%Y Srinivas Katkoori
%Y Ricardo Reis
%I Springer
%3 VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design
%V AICT-418
%P 217-233
%8 2012-08-07
%D 2012
%R 10.1007/978-3-642-45073-0_12
%K memory
%K nonvolatile
%K dynamic
%K volatile
%K unified
%K floating-gate
%K FLASH
%K DRAM
%K high-k dielectric
%K simulation
%Z Computer Science [cs]Conference papers
%X The operation of a novel unified memory device using two floating-gates is described through experimental characterization of a fabricated proof-of-concept device and confirmed through simulation. The dynamic, nonvolatile, and concurrent modes of the device are described in detail. Simulations show that the device compares favorably to conventional memory devices. Applications enabled by this unified memory device are discussed, highlighting the dramatic impact this device could have on next generation memory architectures.
%G English
%Z TC 10
%Z WG 10.5
%2 https://inria.hal.science/hal-01456958/document
%2 https://inria.hal.science/hal-01456958/file/978-3-642-45073-0_12_Chapter.pdf
%L hal-01456958
%U https://inria.hal.science/hal-01456958
%~ IFIP
%~ IFIP-AICT
%~ IFIP-TC
%~ IFIP-WG
%~ IFIP-VLSISOC
%~ IFIP-TC10
%~ IFIP-WG10-5
%~ IFIP-AICT-418