%0 Conference Proceedings
%T Multiple Mutation Testing from FSM
%+ Centre de Recherche Informatique de Montréal = Computer Research Institute of Montréal (CRIM)
%+ Research and Development [General Motors]
%A Petrenko, Alexandre
%A Nguena Timo, Omer
%A Ramesh, S.
%< avec comité de lecture
%( Lecture Notes in Computer Science
%B 36th International Conference on Formal Techniques for Distributed Objects, Components, and Systems (FORTE)
%C Heraklion, Greece
%Y Elvira Albert
%Y Ivan Lanese
%3 Formal Techniques for Distributed Objects, Components, and Systems
%V LNCS-9688
%P 222-238
%8 2016-06-06
%D 2016
%R 10.1007/978-3-319-39570-8_15
%K FSM
%K Conformance testing
%K Mutation testing
%K Fault modelling
%K Fault model-based test generation
%K Test coverage
%K Fault coverage analysis
%Z Computer Science [cs]
%Z Computer Science [cs]/Networking and Internet Architecture [cs.NI]Conference papers
%X Fault model based testing receives constantly growing interest of both, researchers and test practitioners. A fault model is typically a tuple of a specification, fault domain, and conformance relation. In the context of testing from finite state machines, the specification is an FSM of a certain type. Conformance relation is specific to the type of FSM and for complete deterministic machines it is equivalence relation. Fault domain is a set of implementation machines each of which models some faults, such as output, transfer or transition faults. In the traditional checking experiment theory the fault domain is the universe of all machines with a given number of states and input and output sets of the specification. Another way of defining fault domains similar to the one used in classical program mutation is to list a number of FSM mutants obtained by changing transitions of the specification. We follow in this paper the approach of defining fault domain as a set of all possible deterministic submachines of a given nondeterministic FSM, called a mutation machine, proposed in our previous work. The mutation machine contains a specification machine and extends it with a number of mutated transitions modelling potential faults. Thus, a single mutant represents multiple mutations and mutation machine represents numerous mutants. We propose a method for analyzing mutation coverage of tests which we cast as a constraint satisfaction problem. The approach is based on logical encoding and SMT-solving, it avoids enumeration of mutants while still offering a possibility to estimate the test adequacy (mutation score). The preliminary experiments performed on an industrial controller indicate that the approach scales sufficiently well.
%G English
%Z TC 6
%Z WG 6.1
%2 https://inria.hal.science/hal-01432920/document
%2 https://inria.hal.science/hal-01432920/file/426757_1_En_15_Chapter.pdf
%L hal-01432920
%U https://inria.hal.science/hal-01432920
%~ IFIP-LNCS
%~ IFIP
%~ IFIP-TC
%~ IFIP-WG
%~ IFIP-TC6
%~ IFIP-WG6-1
%~ IFIP-FORTE
%~ IFIP-LNCS-9688