%0 Conference Proceedings
%T A Worst Case Performance Model for TDM Virtual Circuit in NoCs
%+ KTH Royal Institute of Technology [Stockholm] (KTH )
%A Chen, Zhipeng
%A Jantsch, Axel
%< avec comité de lecture
%( Lecture Notes in Computer Science
%B IFIP International Conference on Network and Parallel Computing (NPC)
%C Zhengzhou, China
%Y Chen Ding; Zhiyuan Shao; Ran Zheng
%I Springer
%3 Network and Parallel Computing
%V LNCS-6289
%P 452-461
%8 2010-09-13
%D 2010
%R 10.1007/978-3-642-15672-4_38
%Z Computer Science [cs]/Digital Libraries [cs.DL]Conference papers
%X In Network-on-Chip (NoC), Time-Division-Mutiplexing (TDM) Virtual Circuit (VC) is well recognized as being capable to provide guaranteed services in both latency and bandwidth. We propose a method of modeling TDM based VC by using Network Calculus. We derive a tight upper bound of end-to-end delay and buffer requirement for indivdual VC. The performance analysis using Latency-Rate server is also presented in comparsion with our Performance model for TDM Virtual Circuit in NoCs (Pemvin). We conducted experiments on comparing Pemvin to the Latency-Rate server model. Our experiment results show the improvement of Pemvin on tightening the upper bound of end-to-end delay and buffer requirement.
%G English
%2 https://inria.hal.science/hal-01054964/document
%2 https://inria.hal.science/hal-01054964/file/IWNoC_136_final.pdf
%L hal-01054964
%U https://inria.hal.science/hal-01054964
%~ IFIP-LNCS
%~ IFIP
%~ IFIP-LNCS-6289
%~ IFIP-NPC
%~ IFIP-2010