%0 Conference Proceedings
%T Real-Time Biologically-Inspired Image Exposure Correction
%+ Department of Electrical & Computer Engineering Laboratory of Electronics
%A Vonikakis, Vassilios
%A Iakovidou, Chryssanthi
%A Andreadis, Ioannis
%< avec comité de lecture
%( IFIP Advances in Information and Communication Technology
%B 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
%C Rhodes Island, India
%Y Christian Piguet; Ricardo Reis; Dimitrios Soudris
%I Springer
%3 VLSI-SoC: Design Methodologies for SoC and SiP
%V AICT-313
%P 133-153
%8 2008-10-13
%D 2008
%R 10.1007/978-3-642-12267-5_8
%K FPGA
%K Real-Time Image Enhancement
%K Human Visual System
%K High Dynamic Range Imaging
%Z Computer Science [cs]/Digital Libraries [cs.DL]Conference papers
%X This chapter presents a real-time FPGA implementation of a biologically-inspired image enhancement algorithm. The algorithm compensates for the under/over-exposed image regions, emerging when High Dynamic Range (HDR) scenes are captured by contemporary imaging devices. The transformations of the original algorithm, which are necessary in order to meet the requirements of an FPGA-based hardware system, are presented in detail. The proposed implementation, which is synthesized in Altera's Stratix II GX: EP2SGX130GF1508C5 FPGA device, features pipeline architecture, allowing the real-time rendering of color video sequences (25fps) with frame sizes up to 2.5Mpixels.
%G English
%2 https://inria.hal.science/hal-01054267/document
%2 https://inria.hal.science/hal-01054267/file/03130147.pdf
%L hal-01054267
%U https://inria.hal.science/hal-01054267
%~ IFIP
%~ IFIP-AICT
%~ IFIP-AICT-313
%~ IFIP-TC
%~ IFIP-WG
%~ IFIP-TC10
%~ IFIP-WG10-5
%~ IFIP-2010