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		A Reconfigurable Network-on-Chip Architecture for Optimal Multi-Processor SoC Communication Vincenzo Rana , David Atienza , Marco Domenico Santambrogio , Donatella Sciuto , Giovanni Micheli 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Oct 2008, Rhodes Island, India. pp.232-250, ⟨10.1007/978-3-642-12267-5_13⟩ Conference papers hal-01054544v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More
		Timed Coloured Petri Nets for Performance Evaluation of DSP Applications: The 3GPP LTE Case Study Laura Frigerio , Kellie Marks , Argy Krikelis 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Oct 2008, Rhodes Island, India. pp.114-132, ⟨10.1007/978-3-642-12267-5_7⟩ Conference papers hal-01054268v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More
		Physical Design Issues in 3-D Integrated Technologies Vasilis F. Pavlidis , Eby G. Friedman 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Oct 2008, Rhodes Island, India. pp.1-21, ⟨10.1007/978-3-642-12267-5_1⟩ Conference papers hal-01054273v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More
		HTCPNs–Based Tool for Web–Server Clusters Development Slawomir Samolej , Tomasz Szmuc 3rd Central and East European Conference on Software Engineering Techniques (CEESET), Oct 2008, Brno, Czech Republic. pp.131-142, ⟨10.1007/978-3-642-22386-0_10⟩ Conference papers hal-01572551v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More
		Time Efficient Dual-Field Unit for Cryptography-Related Processing Alessandro Cilardo , Nicola Mazzocca 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Oct 2008, Rhodes Island, India. pp.191-210, ⟨10.1007/978-3-642-12267-5_11⟩ Conference papers hal-01054277v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More
		A Temperature-Aware Placement and Routing Algorithm Targeting 3D FPGAs Kostas Siozios , Dimitrios Soudris 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Oct 2008, Rhodes Island, India. pp.211-231, ⟨10.1007/978-3-642-12267-5_12⟩ Conference papers hal-01054276v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More
		Transformational Design of Business Processes for SOA Andrzej Ratkowski , Andrzej Zalewski 3rd Central and East European Conference on Software Engineering Techniques (CEESET), Oct 2008, Brno, Czech Republic. pp.76-90, ⟨10.1007/978-3-642-22386-0_6⟩ Conference papers hal-01572550v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More
		Mining Design Patterns from Existing Projects Using Static and Run-Time Analysis Michal Dobiš , L’ubomír Majtás 3rd Central and East European Conference on Software Engineering Techniques (CEESET), Oct 2008, Brno, Czech Republic. pp.62-75, ⟨10.1007/978-3-642-22386-0_5⟩ Conference papers hal-01572545v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More
		Developing Applications with Aspect-Oriented Change Realization Valentino Vranić , Michal Bebjak , Radoslav Menkyna , Peter Dolog 3rd Central and East European Conference on Software Engineering Techniques (CEESET), Oct 2008, Brno, Czech Republic. pp.192-206, ⟨10.1007/978-3-642-22386-0_15⟩ Conference papers hal-01572548v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More
		Enhancing Use Cases with Screen Designs Łukasz Olek , Jerzy Nawrocki , Mirosław Ochodek 3rd Central and East European Conference on Software Engineering Techniques (CEESET), Oct 2008, Brno, Czech Republic. pp.48-61, ⟨10.1007/978-3-642-22386-0_4⟩ Conference papers hal-01572553v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More
		State of the Practice in Software Effort Estimation: A Survey and Literature Review Adam Trendowicz , Jürgen Münch , Ross Jeffery 3rd Central and East European Conference on Software Engineering Techniques (CEESET), Oct 2008, Brno, Czech Republic. pp.232-245, ⟨10.1007/978-3-642-22386-0_18⟩ Conference papers hal-01572546v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More
		Refactoring the Documentation of Software Product Lines Konstantin Romanovsky , Dmitry Koznov , Leonid Minchin 3rd Central and East European Conference on Software Engineering Techniques (CEESET), Oct 2008, Brno, Czech Republic. pp.158-170, ⟨10.1007/978-3-642-22386-0_12⟩ Conference papers hal-01572537v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More
		Towards a Compiler for Business-IT Systems Jana Koehler , Thomas Gschwind , Jochen Küster , Hagen Völzer , Olaf Zimmermann 3rd Central and East European Conference on Software Engineering Techniques (CEESET), Oct 2008, Brno, Czech Republic. pp.1-19, ⟨10.1007/978-3-642-22386-0_1⟩ Conference papers hal-01572538v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More
		Open Work of Two-Hemisphere Model Transformation Definition into UML Class Diagram in the Context of MDA Oksana Nikiforova , Natalja Pavlova 3rd Central and East European Conference on Software Engineering Techniques (CEESET), Oct 2008, Brno, Czech Republic. pp.118-130, ⟨10.1007/978-3-642-22386-0_9⟩ Conference papers hal-01572536v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More
		Service-Based Realization of Business Processes Driven by Control-Flow Patterns Petr Weiss 3rd Central and East European Conference on Software Engineering Techniques (CEESET), Oct 2008, Brno, Czech Republic. pp.91-102, ⟨10.1007/978-3-642-22386-0_7⟩ Conference papers hal-01572549v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More
		Code Generation for a Bi-dimensional Composition Mechanism Jacky Estublier , Anca Daniela Ionita , Tam Nguyen 3rd Central and East European Conference on Software Engineering Techniques (CEESET), Oct 2008, Brno, Czech Republic. pp.171-185, ⟨10.1007/978-3-642-22386-0_13⟩ Conference papers hal-01572540v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More
		Software Product Line Adoption – Guidelines from a Case Study Pasi Kuvaja , Jouni Similä , Hanna Hanhela 3rd Central and East European Conference on Software Engineering Techniques (CEESET), Oct 2008, Brno, Czech Republic. pp.143-157, ⟨10.1007/978-3-642-22386-0_11⟩ Conference papers hal-01572534v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More
		Universal Methodology to Handle Differential Pairs during Pin Assignment Tilo Meister , Jens Lienig , Gisbert Thomke 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Oct 2008, Rhodes Island, India. pp.22-42, ⟨10.1007/978-3-642-12267-5_2⟩ Conference papers hal-01054272v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More
		A Lifting-Based Discrete Wavelet Transform and Discrete Wavelet Packet Processor with Support for Higher Order Wavelet Filters Andre Guntoro , Manfred Glesner 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Oct 2008, Rhodes Island, India. pp.154-173, ⟨10.1007/978-3-642-12267-5_9⟩ Conference papers hal-01054539v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More
		Real-Time Biologically-Inspired Image Exposure Correction Vassilios Vonikakis , Chryssanthi Iakovidou , Ioannis Andreadis 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Oct 2008, Rhodes Island, India. pp.133-153, ⟨10.1007/978-3-642-12267-5_8⟩ Conference papers hal-01054267v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More
		Advanced Data Organization for Java-Powered Mobile Devices Tomáš Tureček , Petr Šaloun 3rd Central and East European Conference on Software Engineering Techniques (CEESET), Oct 2008, Brno, Czech Republic. pp.186-191, ⟨10.1007/978-3-642-22386-0_14⟩ Conference papers hal-01572542v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More
		Automated Generation of Implementation from Textual System Requirements Jan Franců , Petr Hnětynka 3rd Central and East European Conference on Software Engineering Techniques (CEESET), Oct 2008, Brno, Czech Republic. pp.34-47, ⟨10.1007/978-3-642-22386-0_3⟩ Conference papers hal-01572535v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More
		Exploratory Comparison of Expert and Novice Pair Programmers Andreas Höfer 3rd Central and East European Conference on Software Engineering Techniques (CEESET), Oct 2008, Brno, Czech Republic. pp.218-231, ⟨10.1007/978-3-642-22386-0_17⟩ Conference papers hal-01572544v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More
		A Framework for Defect Prediction in Specific Software Project Contexts Dindin Wahyudin , Rudolf Ramler , Stefan Biffl 3rd Central and East European Conference on Software Engineering Techniques (CEESET), Oct 2008, Brno, Czech Republic. pp.261-274, ⟨10.1007/978-3-642-22386-0_20⟩ Conference papers hal-01572547v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More
		On the Comparison of Different Number Systems in the Implementation of Complex FIR Filters Gian Carlo Cardarilli , Alberto Nannarelli , Marco Re 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Oct 2008, Rhodes Island, India. pp.174-190, ⟨10.1007/978-3-642-12267-5_10⟩ Conference papers hal-01054278v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More
		Timing Error Detection and Correction by Time Dilation Andreas Floros , Yiorgos Tsiatouhas , Xrysovalantis Kavousianos 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Oct 2008, Rhodes Island, India. pp.271-285, ⟨10.1007/978-3-642-12267-5_15⟩ Conference papers hal-01054274v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More
		Fast Instruction Memory Hierarchy Power Exploration for Embedded Systems Nikolaos Kroupis , Dimitrios Soudris 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Oct 2008, Rhodes Island, India. pp.251-270, ⟨10.1007/978-3-642-12267-5_14⟩ Conference papers hal-01054275v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More
		Assessing the Quality of Quality Gate Reference Processes Thomas Flohr 3rd Central and East European Conference on Software Engineering Techniques (CEESET), Oct 2008, Brno, Czech Republic. pp.207-217, ⟨10.1007/978-3-642-22386-0_16⟩ Conference papers hal-01572539v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More
		Testing of Heuristic Methods: A Case Study of Greedy Algorithm A. C. Barus , T. Y. Chen , D. Grant , F. -C. Kuo , M. F. Lau 3rd Central and East European Conference on Software Engineering Techniques (CEESET), Oct 2008, Brno, Czech Republic. pp.246-260, ⟨10.1007/978-3-642-22386-0_19⟩ Conference papers hal-01572541v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More
		Analysis and Design of Charge Pumps for Telecommunication Applications Vassilis Kalenteridis , Konstantinos Papathanasiou , Stylianos Siskos 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Oct 2008, Rhodes Island, India. pp.43-60, ⟨10.1007/978-3-642-12267-5_3⟩ Conference papers hal-01054271v1	Send to ORCID Export BibTeX XML-TEI Dublin Core DC Terms EndNote DataCite Advanced export Share More

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A Reconfigurable Network-on-Chip Architecture for Optimal Multi-Processor SoC Communication

Timed Coloured Petri Nets for Performance Evaluation of DSP Applications: The 3GPP LTE Case Study

Physical Design Issues in 3-D Integrated Technologies

HTCPNs–Based Tool for Web–Server Clusters Development

Time Efficient Dual-Field Unit for Cryptography-Related Processing

A Temperature-Aware Placement and Routing Algorithm Targeting 3D FPGAs

Transformational Design of Business Processes for SOA

Mining Design Patterns from Existing Projects Using Static and Run-Time Analysis

Developing Applications with Aspect-Oriented Change Realization

Enhancing Use Cases with Screen Designs

State of the Practice in Software Effort Estimation: A Survey and Literature Review

Refactoring the Documentation of Software Product Lines

Towards a Compiler for Business-IT Systems

Open Work of Two-Hemisphere Model Transformation Definition into UML Class Diagram in the Context of MDA

Service-Based Realization of Business Processes Driven by Control-Flow Patterns

Code Generation for a Bi-dimensional Composition Mechanism

Software Product Line Adoption – Guidelines from a Case Study

Universal Methodology to Handle Differential Pairs during Pin Assignment

A Lifting-Based Discrete Wavelet Transform and Discrete Wavelet Packet Processor with Support for Higher Order Wavelet Filters

Real-Time Biologically-Inspired Image Exposure Correction

Advanced Data Organization for Java-Powered Mobile Devices

Automated Generation of Implementation from Textual System Requirements

Exploratory Comparison of Expert and Novice Pair Programmers

A Framework for Defect Prediction in Specific Software Project Contexts

On the Comparison of Different Number Systems in the Implementation of Complex FIR Filters

Timing Error Detection and Correction by Time Dilation

Fast Instruction Memory Hierarchy Power Exploration for Embedded Systems

Assessing the Quality of Quality Gate Reference Processes

Testing of Heuristic Methods: A Case Study of Greedy Algorithm

Analysis and Design of Charge Pumps for Telecommunication Applications