A Methodology for Design of Unbuffered Router Microarchitecture for S-Mesh NoC - Network and Parallel Computing Access content directly
Conference Papers Year : 2010

A Methodology for Design of Unbuffered Router Microarchitecture for S-Mesh NoC

Abstract

Currently, most of Network on-Chip (NoC) architectures have some limitation in routing decisions. And it makes router nodes overloaded, and sequentially forms deadlock, livelock and congestion. A simple unbuffered router microarchitecture for S-mesh NoC architecture is proposed in this paper. Unbuffered router transforms message without making routing decision. Simulation results showed that S-mesh could get optimal performance in message latency compared with 2D-mesh, Butterfly and Octagon NoC architectures. The Design Compiler synthesis results showed that unbuffered router has obvious advantages on area, and it gets higher operation speed.
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hal-01054965 , version 1 (11-08-2014)

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Hao Liu, Feifei Cao, Dongsheng Liu, Xuecheng Zou, Zhigang Zhang. A Methodology for Design of Unbuffered Router Microarchitecture for S-Mesh NoC. IFIP International Conference on Network and Parallel Computing (NPC), Sep 2010, Zhengzhou, China. pp.442-451, ⟨10.1007/978-3-642-15672-4_37⟩. ⟨hal-01054965⟩
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