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A Configurable Hardware Architecture for Runtime Application of Network Calculus

Xiao Hu , Zhonghai Lu
17th IFIP International Conference on Network and Parallel Computing (NPC), Sep 2020, Zhengzhou, China. pp.203-216, ⟨10.1007/978-3-030-79478-1_18⟩
Conference papers hal-03768725v1
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FPGA-Based Multi-precision Architecture for Accelerating Large-Scale Floating-Point Matrix Computing

Longlong Zhang , Yuanxi Peng , Xiao Hu , Ahui Huang , Tian Tian
17th IFIP International Conference on Network and Parallel Computing (NPC), Sep 2020, Zhengzhou, China. pp.191-202, ⟨10.1007/978-3-030-79478-1_17⟩
Conference papers hal-03768753v1