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Conference Papers Year : 2017

Composing Families of Timed Automata

Abstract

Featured Timed Automata (FTA) is a formalism that enables the verification of an entire Software Product Line (SPL), by capturing its behavior in a single model instead of product-by-product. However, it disregards compositional aspects inherent to SPL development. This paper introduces Interface FTA (IFTA), which extends FTA with variable interfaces that restrict the way automata can be composed, and with support for transitions with atomic multiple actions, simplifying the design. To support modular composition, a set of Reo connectors are modelled as IFTA. This separation of concerns increases reusability of functionality across products, and simplifies modelling, maintainability, and extension of SPLs. We show how IFTA can be easily translated into FTA and into networks of Timed Automata supported by UPPAAL. We illustrate this with a case study from the electronic government domain.
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hal-01760866 , version 1 (06-04-2018)

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Guillermina Cledou, José Proença, Luis Soares Barbosa. Composing Families of Timed Automata. 7th International Conference on Fundamentals of Software Engineering (FSEN), Apr 2017, Teheran, Iran. pp.51-66, ⟨10.1007/978-3-319-68972-2_4⟩. ⟨hal-01760866⟩
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