Improvements to Satisfiability-Based Boolean Function Bi-Decomposition - VLSI-SoC: Advanced Research for Systems on Chip
Conference Papers Year : 2012

Improvements to Satisfiability-Based Boolean Function Bi-Decomposition

Abstract

Boolean function bi-decomposition is pervasive in logic synthesis. Bi-decomposition entails the decomposition of a Boolean function into two other functions connected by a simple two-input gate. Existing solutions are based on Binary Decision Diagrams (BDDs) and, more recently, on Boolean Satisfiability (SAT). Recent work exploited the identification of Minimally Unsatisfiable Subformulas (MUSes) for computing the sets of variables to use in Boolean function bi-decomposition. This paper develops new techniques for improving the use of MUSes in function bi-decomposition. The first technique exploits structural properties of the function being decomposed, whereas the second technique exploits group-oriented MUSes. Experimental results obtained on representative benchmarks from logic synthesis demonstrate significant improvements both in performance and in the quality of decompositions.
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hal-01519765 , version 1 (09-05-2017)

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Huan Chen, Joao Marques-Silva. Improvements to Satisfiability-Based Boolean Function Bi-Decomposition. 19th International Conference on Very Large Scale Integration (VLSISOC), Oct 2011, Hong Kong, China. pp.52-72, ⟨10.1007/978-3-642-32770-4_4⟩. ⟨hal-01519765⟩
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